This invention relates to a circuit which shifts a logic signal from one voltage level to another in an integrated circuit. In particular, the circuit shifts a logic signal from a low voltage supply magnitude to a higher voltage supply magnitude and is useful for systems with very low available power.
This level shift function is needed whenever a logic gate output operating at one power supply voltage level drives the input of another logic gate which operates at a different power supply voltage level. An example of such a situation is in an integrated circuit having a One-Time-Programmable (OTP) memory where the address decoding logic, which may operate from a VDD=0.8V supply, needs to drive an OTP memory array decoder operating at 1.3V. That is, the address decoding logic circuits operate between 0V and 0.8V, and the memory array decoder circuits operate between 0V and 1.3V. This disparity in voltage levels requires a voltage level shifter circuit.
A problem with a conventional voltage level shifter is that during the time when the level shifter is switching, there is a significant current draw from the power supplies. Some applications do not have the available power to provide this switching current.
A voltage level shifter circuit is needed where the maximum switching current can be controlled so that power consumption significantly reduced. The present invention provides for such a design.